1. Field of the Invention
The present invention relates to a phase-locked loop circuit, and more specifically to a phase-locked loop circuit for use in a data reading of magnetic disc devices such as floppy disc devices and hard disc devices.
2. Description of Related Art
At present, phase-locked loop circuits have been widely used for reading circuits for magnetic disc devices such as floppy disc devices and hard disc devices. Conventional phase-locked loop circuits have been composed of a one-shot multivibrator receiving a read data signal for generating a one-shot pulse signal in synchronism with a rising edge or falling edge of the read signal. The reading signal is also supplied to set a reset-set flipflop which is reset by an output of a frequency divider. The one-shot signal and an output of the flipflop are phase-compared in a phase detector, which in turn generates a charge-up signal or a discharge-down signal to a charge pump. An output of the charge pump is connected though a low pass filter to a voltage controlled oscillator, whose output is connected to the frequency divider. With this, a phase-locked loop is completed.
In the case that the above mentioned phase-locked loop circuit is incorporated in a data reading circuit for a floppy disc device which can selectively assume various data transfer rates, the frequency division ratio of the frequency divider is selectively set to different values corresponding to the various data transfer rates, and at the same time, the one-shot multivibrator is also set so that the pulse width of each one-shot pulse can be adjusted in correspondence to the data transfer rates.
Under the above mentioned circumstance, when the phase-locked loop circuit operates at a relatively low data transfer rate, the conventional circuit has been encountered with such a disadvantage that the reading precision is deteriorated due to a phase error attributable to a quantization error (in clock) generated in a digital counter. Conventionally, in order to prevent the deterioration of the reading precision, it was to use an multivibrator whose output width can be adjusted by an external resister or capacitor circuit.
In addition, the change of the frequency division ratio could not comply with different high data transfer rates of 1 Mbps or more, and therefore, to comply a plurality of high data transfer rates, the conventional phase-locked loop circuits have to include one one-shot multivibrator for each of all the data transfer rates, and accordingly, a correspondingly number of sets of external resister and capacitor have to be provided.
Furthermore, in the proximity of zero phase difference, the charge-up signal and the discharge-down signal of the phase detector has a very narrow pulse width. However, a very narrow pulse signal will disappear while it is transferred through the charge pump, if the signal transfer system does not have a sufficient transmission power. Because of this, there exists a region in which a phase difference cannot apparently be detected, and therefore, after the phase-locked loop circuit is locked, a jitter appears in the oscillation frequency of the voltage controlled oscillator, with the result that the circuit becomes unstable.